Frequently, vital components are duplicated to improve reliability in systems which must be highly reliable, e.g., telephone systems. Duplicated components provide continued system operation in case of failure and during subsequent repair time.
One such duplicated system component is a clock pulse generator, i.e., a system clock. Presently used clock duplication schemes include diode "OR", majority rule, and switching to a standby clock upon failure of an on-line clock. Each of these schemes suffers from problems and limitations. If two clock circuits are combined by diode "OR" gates, only one clock failure mode can be protected, i.e., the diodes can be arranged to protect against either a stuck-high failure or a stuck-low failure but not both. In a majority rule arrangement three or more clock circuits are compared and combined so that the clock signal of the majority is passed to the output, i.e., at least three clock circuits are required. Finally where a standby clock circuit is switched into operation upon the failure of an on-line clock circuit, both clocks must be monitored to ensure reliability and several clock pulses may be lost during the switch with resulting system disruption.